Adrian Sibiga
Analog front ends for the MALTA-2 and MALTA-3 monolithic active-pixel sensors at CERN.
Students and Supervision
Current students, supervised theses, and the training approach connecting projects across the research program.
Current graduate students
The group spans the complete path from device behaviour to application-level interpretation. The four stages below place every current and confirmed incoming student within that end-to-end research flow.
Physical interfaces
Electronic and photonic interfaces whose physical behaviour establishes system performance.
Nick Wicklund
Process-aware microring-resonator modelling with compact local neural predistortion or receiver equalization.
Analog circuits and data conversion
Circuit techniques for generating, conditioning, sampling, and converting high-speed signals.
Deniz Sulutas
Time-interleaved analog-to-digital converters.
Ibrahim Kasim
Linearized active inductors for predistortion in RF, broadband, and optical interfaces.
Kevin Hu
High-speed analog-to-digital converters, with an intended time-interleaved SAR focus.
Miles Stillie
ADC sampling kickback and mitigation.
Morgan Smilde
Time-to-digital converters.
Hardware intelligence and design
Machine intelligence embodied in hardware, and AI used to create and verify that hardware.
Jonathan Levine
High-performance FPGA accelerators for AI.
Aaron Yu
FPGA spiking neural networks for event-based gesture processing and SNN Hough transforms.
Jesse Levine
Efficient activation-function implementations in FPGAs.
Signal intelligence and adaptive systems
Learning and inference applied to measured signals, modulation, and system behaviour.
Liam McPherson
Language-model and sequence-model interpretation of IMU time-series data for human motion.
Axel Bondelo
AI-mediated signal modulation.
Physical phenomenaAnalog representationDigital implementationSystem interpretation
MOSAIC GroupDetailed member profiles and current project pagesComplete graduate supervision register
This consolidated register presents the named graduate-supervision roster, including completed, active, incoming, and discontinued programs.
Current and incoming
- Axel BondeloDoctorate · IncomingAI for Signal Modulation
- Miles StillieMaster’s Thesis · IncomingADC Sampling Kickback
- Jonathan LevineDoctorate · In ProgressHigh-Performance FPGA Accelerators for AI
- Nick WicklundDoctorate · In ProgressNeural Network-Based Predistorters and Channel Equalizers for Optical Communications
- Adrian SibigaMaster’s Thesis · In ProgressAnalog Front End for MALTA-2 and MALTA-3 Sensors
- Kevin HuMaster’s Thesis · IncomingHigh-Speed Analog-to-Digital Converters
- Deniz SulutasMaster’s Thesis · In ProgressTime-Interleaved Analog-to-Digital Converters
- Ibrahim KasimMaster’s Thesis · In ProgressLinearization of Active Inductors for Predistortion Circuits
- Jesse LevineMaster’s Thesis · In ProgressEfficient Activation Function Implementations in FPGAs
- Liam McPhersonMaster’s Thesis · In ProgressLarge Language Model Determination of Human Motion from Inertial Measurement Units
- Morgan SmildeMaster’s Thesis · In ProgressTime-to-Digital Converters
- Aaron YuMaster’s Thesis · In ProgressSpiking Neural Networks Implemented in Field Programmable Gate Arrays
Earlier supervision
- Jonathon LevineMaster’s Thesis · CompletedHardware Implementation of Machine Learning Accelerator
- Seth ThompsonMaster’s Thesis · CompletedInterleaved SAR-ADC with Reduced Capacitors
- Name withheldMaster’s Thesis · Left ProgramEnhanced PSRR for LDO
- Ruihang WangMaster’s Thesis · CompletedHough Transform Hardware Implementation Using Spiking Neural Networks
- Name withheldMaster’s Thesis · WithdrawnHigh Performance Architectures for Machine Learning
- Kareem El-GablyMaster’s non-Thesis · CompletedSpiking Neural Network Building Blocks
- Armin KaramiMaster’s Thesis · All But DegreeTransimpedance Amplifiers in 130nm CMOS
- Zach DunniganMaster’s non-Thesis · CompletedElectrospinning Analysis
- Ashwin MasilamaniMaster’s non-Thesis · CompletedStandard Cell library design
- Fares ElzoheiryMaster’s non-Thesis · CompletedStandard Cell library design
- Manoj RamamoorthyMaster’s non-Thesis · CompletedStandard Cell library design
- Saijagan SaijaganMaster’s non-Thesis · CompletedStandard Cell library design
- Colin FernandesMaster’s Thesis · CompletedElectrospun PEDOT:PSS Electrolytic Capacitors for Microelectronic Energy Storage
- Christopher SchopfMaster’s non-Thesis · CompletedAnalog Circuits for fNIR
- David BertonMaster’s Thesis · CompletedDesign of a 10-bit SAR ADC in 0.13 µm CMOS
- Xinjie WangDoctorate · CompletedReduction of Power Supply Induced Jitter with Applications to DDR Controllers
- Ghazaleh VazhbakhtMaster’s Thesis · CompletedFPGA-based Outlier Detection
- Name withheldMaster’s Thesis · WithdrawnBattery Lifetime Extension Technology
- Satyanarayana Shashank BrahmandlapalliMaster’s Thesis · CompletedBioimpedance measurement analog integrated circuits
- Ruixue WangMaster’s Thesis · CompletedLow noise and low distortion analog multiplexer
- Tianshuo ZhaoMaster’s Thesis · CompletedTime-to-Digital Converters with High Precision and Low Power Operation
- Name withheldMaster’s Thesis · WithdrawnSmart Textiles
- Ahmed AlsaafinMaster’s non-Thesis · CompletedBinary Weighted Current Sources Digital-to-Analog Converter
- Name withheldMaster’s Thesis · WithdrawnRadio Frequency Integrated Circuits
- Nick StupichMaster’s Thesis · CompletedLow Power Parallel Rolling Shutter Artifact Removal
- Niranjan IyerMaster’s Thesis · CompletedLinearity Improvement In Vernier Delay Chain Based Time Difference Amplifiers
- Lik WuMaster’s non-Thesis · CompletedDigital Power Management
- Octavian StelescuMaster’s Thesis · CompletedFemto Joule per Conversion 8-Bit Comparator Assisted Binary Search Analog to Digital Converter
- Dan LanfranconiMaster’s Thesis · CompletedReduced Capacitor 8-bit SAR ADC
- Ziad El-KhatibDoctorate · CompletedCMOS RFIC High-Frequency Broadband Power Amplifier Linearization
- Ziad El-KhatibMaster’s Thesis · CompletedFully-integrated fully-differential silicon RF CMOS distributed amplifier based on multi-Tanh linearization principle
- Lado FilipovicMaster’s Thesis · CompletedLow Power 10-bit Analog to Digital Converter
- Sinisa MilicevicDoctorate · CompletedA frequency synthesizer with frequency divider and frequency multiplier for spur reduction
- Sinisa MilicevicMaster’s Thesis · CompletedA Multi-Band Voltage-Controlled Ring Oscillator
- Karim AbdelhalimMaster’s Thesis · CompletedAn Ultra Low Power ADC for Biomedical Applications
- Ayman MoktarDoctorate · CompletedAnalog Fiber Link Modeling
- Ghyslain GagnonDoctorate · CompletedContinuous compensation of binary-weighted DAC nonlinearities in bandpass delta-sigma modulators
- Zhan XuDoctorate · CompletedLaser Predistortion in CMOS
- Celine FletcherMaster’s Thesis · CompletedNoise Reduction in Analog Circuits
- Fiona ShearerMaster’s Thesis · CompletedRadio Frequency Cubing Circuit
- Yasser SolimanMaster’s Thesis · CompletedUltrawideband Low Noise Amplifier
- Mark HoulgateMaster’s Thesis · CompletedAdaptable MOS current mode logic for multi-band frequency synthesizers
- Daniel OlszewskiMaster’s Thesis · CompletedTunable Filter and Receive Signal Strength Indicator for Detecting Whitespace in the Frequency Spectrum
- Name withheldMaster’s Thesis · WithdrawnPower Amplifiers in CMOS
- Samy GhoniemyDoctorate · CompletedLaser Modeling for Radio over Fiber
What the thesis record shows
The supervision record is an intellectual history of the laboratory. Semiconductor-laser models led to analog predistortion and modern photonic correction; oscillator and delay research led to synthesis, TDCs, jitter analysis, CDR, and VCO-based conversion; low-voltage ADC projects developed into calibrated, reduced-capacitor, and interleaved architectures; FPGA signal processing led into current spiking and quantized AI hardware.
Models that support predistortion
Samy Ghoniemy's 2004 PhD built a physical and system model for the RF/fibre optical interface. Ayman Moktar's 2007 PhD extended the modelling to isolator-free DFB laser operation with optical feedback for analog CATV applications. Fiona Shearer's 2006 MASc implemented CMOS cubic-function circuits for third-order cancellation, while Zhan Xu's 2010 PhD developed adaptive second- and third-order correction for directly modulated lasers. Together they establish a durable model-and-correct lineage.
Low-energy ADCs and timing converters
Karim Abdelhalim's subthreshold biomedical ADCs reported 8.09 and 10.3 pJ per conversion cycle. Lado Filipovic's low-power 10-bit ADC and Octavian Stelescu's femtojoule comparator-assisted binary-search ADC extended that converter lineage. Niranjan Iyer's Vernier time-difference amplifier and Tianshuo Zhao's MCML time-to-digital converter carried the work into precision timing. Later theses developed continuous DAC-mismatch correction, reduced-capacitor SAR arrays, and algorithm-generated SAR switching sequences.
Non-Conventional Capacitor SAR-ADCs and CAB ADC
Daniel Lanfranconi's 2014 MASc developed a reduced-capacitor eight-bit SAR ADC. Octavian Stelescu's 2012 MASc developed a femtojoule-per-conversion comparator-assisted binary-search (CAB) ADC. David Berton's 2018 MASc used a backtracking algorithm to generate a 10-bit SAR switching sequence with only 25 unit capacitors. Seth Thompson's 2025 MASc combines a non-standard capacitor array, clock boosting, and a voltage-controlled delay element; schematic studies report approximately 9.5–9.7 effective bits after compensation at 10 kS/s, 1.82 μW, and 226.5 fJ per conversion step.
Neuromorphic and binarized accelerators
Ruihang Wang's 2025 MASc develops a fabricated mixed-signal SNN for Hough-transform line detection, reporting 266.1 pJ per frame in 3 mm². Jonathan Levine's 2025 MASc compiles binarized networks to bespoke FPGA hardware, with reported MNIST latencies near 85 ns and a jet-tagging example near 23 ns. These results are thesis-specific and do not imply identical performance in later systems.
Supervised theses
This catalogue presents the graduate theses listed in the supervision record. Repository links are provided where available; entries without links retain the confirmed student, degree, year, and thesis title.
| Year | Student and thesis | Degree | Record |
|---|---|---|---|
| 2025 | Seth Thompson Interleaved SAR-ADC with Reduced Capacitors | MASc | Under embargo |
| 2025 | Ruihang Wang Application-Specific Integrated Circuit Spiking Neural Network for Parallel Hough Transform | MASc | Under embargo |
| 2025 | Jonathan Aaron Levine Hardware-Accelerated Binarized Neural Networks | MASc | Under embargo |
| 2019 | Colin Fernandes Electrospun PEDOT:PSS Electrolytic Capacitor Electrodes for Microelectronic Energy Storage | MASc | Record ↗ |
| 2018 | Ghazaleh Vazhbakht Configurable FPGA-Based Outlier Detection for Time Series Data | MASc | Record ↗ |
| 2018 | David Berton Backtracking Algorithm-Aided Design of a 10-Bit SAR ADC | MASc | Record ↗ |
| 2017 | Xinjie Wang Reduction of Power Supply Induced Jitter with Applications to DDR Controllers | PhD | Record ↗ |
| 2017 | Tianshuo Zhao A High Resolution of MCML-Based Time-to-Digital Converter Implementation | MASc | Record ↗ |
| 2017 | Satyanarayana Shashank Brahmandlapalli Determination of Bioimpedance Using Multi-Frequency Bio-electrical Impedance Analysis | MASc | Record ↗ |
| 2016 | Ruixue Wang A Low Power 8 to 1 Analog Multiplexer for Bio-Signal Acquisition System with a Function of Amplification | MASc | Record ↗ |
| 2014 | Niranjan Iyer Linearity Improvement in Vernier Delay Chain Based Time Difference Amplifiers | MASc | Record ↗ |
| 2014 | Nick Stupich Low Power Parallel Rolling Shutter Artifact Removal | MASc | Record ↗ |
| 2014 | Daniel Lanfranconi Reduced Capacitor Eight Bit SAR ADC | MASc | Record ↗ |
| 2012 | Ziad El-Khatib Highly-linearized CMOS distributed bidirectional amplifier with cross-coupled compensator for wireless communications | PhD | Record ↗ |
| 2012 | Octavian Stelescu Femto Joule per conversion 8-bit comparator assisted binary search ADC | MASc | Record ↗ |
| 2010 | Zhan Xu A predistortion circuit for direct modulated lasers for radio over fiber applications | PhD | Record ↗ |
| 2009 | Lado Filipovic Low power 10-bit ADC | MASc | Record ↗ |
| 2009 | Ghyslain Gagnon Continuous compensation of binary-weighted DAC nonlinearities in bandpass delta-sigma modulators | PhD | Record ↗ |
| 2008 | Sinisa Milicevic A frequency synthesizer with frequency divider and frequency multiplier for spur reduction | PhD | Record ↗ |
| 2007 | Karim Abdelhalim Ultra low power ADC for biomedical applications | MASc | Record ↗ |
| 2007 | Ayman Moktar Isolator-free DFB laser for analog CATV applications | PhD | Record ↗ |
| 2006 | Ziad El-Khatib Fully-integrated fully-differential silicon RF CMOS distributed amplifier based on multi-Tanh linearization principle | MASc | Record ↗ |
| 2006 | Fiona Shearer CMOS analog cubing circuits for radio-over-fiber predistortion | MASc | Record ↗ |
| 2006 | Daniel Olszewski Tunable filter and receive signal strength indicator for detecting whitespace in the frequency spectrum | MASc | Record ↗ |
| 2006 | Celine Fletcher VCO phase noise reduction technique | MASc | Record ↗ |
| 2005 | Yasser Soliman CMOS LNA for impulse-radio UWB | MASc | Record ↗ |
| 2005 | Sinisa Milicevic A multi-band voltage-controlled ring oscillator | MASc | Record ↗ |
| 2005 | Mark Houlgate Adaptable MOS current mode logic for multi-band frequency synthesizers | MASc | Record ↗ |
| 2004 | Samy Ghoniemy RF/fiber optical interface for microcellular wireless transceivers | PhD | Record ↗ |
Supervision and training approach
Students work across levels of abstraction: physical plant and measurement, device and circuit models, schematic and layout, digital support logic, FPGA or ASIC mapping, software tooling, and the evidence needed to decide whether a result is valid.