Current and continuing
High-speed optical and electrical interconnects
Short-reach links, TIAs, drivers, equalization, CDR, SerDes, microring models and predistortion.
Current priorities across mixed-signal systems, physical interfaces, intelligent hardware, detector electronics, and their theoretical foundations.
Research Register
The research program moves between algorithms, circuits, physical interfaces, and system evidence. Across changing application domains, the recurring question is stable: what representation, circuit, architecture, or correction preserves the information that matters under real limits of bandwidth, noise, timing, energy, variability, and incomplete observation?
Current and continuing
Short-reach links, TIAs, drivers, equalization, CDR, SerDes, microring models and predistortion.
2005–present
ADCs, SAR and time-interleaved architectures, VCO conversion, DAC calibration, TDCs, sampling and adaptive front ends.
2018–present
Spiking, binarized and ternary systems; quantized accelerators; FPGA and ASIC implementation.
Current
MALTA-family front ends, asynchronous MAPS readout, surrogate models, layout, timing and radiation-aware design.
1996–present
Quantization, synchronization, clock translocation, spectral diagnosis, graph consistency and application-optimal limits.
Active and exploratory
Hierarchical in-circuit intelligence, observable-aware surrogates, automated research, design telemetry and diffusion processes.
Recent and active
Closed-loop quantum control and related technologies form a recent five-paper research cluster.
Research Outlook
Work in RF CMOS and optoelectronics established ways to model physical signal paths, identify the impairments that survive to a receiver, and place correction where it has practical value. Those same questions reappear in short-haul optical and copper interconnects, where drivers, channels, front ends, equalizers, clocks, and data converters must be understood as one coupled system.
Data conversion and adaptive analog interfaces draw directly on that foundation. Sampling, calibration, phase noise, timing, and converter architecture connect to the earlier work on oscillators and synchronization, while biomedical sensing and detector electronics extend the same concerns to weak physical signals, event-driven readout, and constrained front ends. The application changes, but the need to preserve information through imperfect hardware remains constant.
Neuromorphic, quantized, and AI-assisted hardware add computation to this lineage. They reuse ideas from mixed-signal modelling, approximation, timing, calibration, and observable-aware correction, while also providing new methods for automated design and adaptive control. The streams therefore reinforce one another: theory supplies limits and models; circuits expose real constraints; sensing and communication systems define useful observables; and intelligent hardware provides new ways to implement, verify, and adapt the resulting solutions.
Research in physical signal interfaces, conversion, synchronization, correction, and hardware intelligence.
1996–present
Oscillators; frequency conversion
Synchronization; image-sensor circuits
Predistortion; broadband amplifiers
Optical and copper links; TIA front ends; SerDes
Retiming; deskew; microring drivers
2005–present
TDCs; sensor front ends
Offset correction; DAC mismatch correction
Phase noise; jitter
Timing validity; sampling kickback
1996–present
Image sensing; detector interfaces
EMG, ECG, and inertial sensing
Physiological inference
CERN-linked collaboration
Encoding; surrogate modelling; radiation-aware CMOS
1994–present
Genetic algorithms; active contours; constrained search
Variational ideas
FPGA and ASIC inference; spiking hardware
Binary, ternary, and quantized AI hardware
Python-to-RTL; automated AMS verification; AI-assisted layout; hierarchical in-circuit intelligence